AMD Unveils Versal Premium Gen 2 Memory on Package Adaptive SoCs
AMD has introduced the Versal Premium Gen 2 Memory on Package (MoP) adaptive system-on-chips (SoCs), a significant advancement in high-bandwidth, compact system design. The new MoP architecture integrates up to 32 GB of LPDDR5X memory directly into a single package, delivering up to 288 GB/s of bandwidth while reducing board area by up to 60%. This innovation enables engineers to develop high-performance systems without the complexity and delays associated with traditional board-level memory design.
Revolutionizing High-Bandwidth System Design
As AI, networking, aerospace, and defense applications demand greater data throughput within increasingly constrained space and power budgets, the Versal Premium Gen 2 MoP SoCs are engineered to meet these challenges. Target applications include test and measurement equipment, professional video editing systems, and VPX platforms for secure communications and defense acceleration.
Advanced Connectivity and Scalability
The Versal Premium Gen 2 MoP devices feature integrated CXL 3.1 and PCIe 6.0 hard IP, supporting data transfer rates up to 64 Gb/s. When paired with AMD EPYC CPUs, these SoCs accelerate data-intensive workloads and provide system architects with the flexibility to scale memory resources. With LPDDR5X support up to 9,000 Mb/s and compatibility with CXL memory pooling and expansion modules, the platform is designed for future-proof scalability.
Engineered for Longevity and Reliability
Versal Premium Gen 2 MoP adaptive SoCs are built for demanding environments, supporting industrial-grade operation from -40°C to 110°C. This makes them ideal for always-on, mission-critical systems where both performance and resilience are essential. The devices offer over 15 years of life cycle support, helping to decouple product availability from the shorter refresh cycles typical of high-bandwidth memory (HBM) in data centers. This reduces the risk of forced redesigns due to memory end-of-life or supply constraints.
Enhanced Security Features
Security is a core focus of the Versal Premium Gen 2 MoP platform. PCIe Integrity and Data Encryption (IDE), introduced in PCIe 6.0, secures data in transit at the link layer, protecting against physical attacks. Integrated DDR memory encryption safeguards data at rest without consuming programmable logic resources. Additionally, hard 400G high-speed crypto engines enable secure, high-bandwidth processing without compromising throughput.
Accelerating Development and Time-to-Market
The pre-validated, in-package LPDDR5X interface eliminates the need for high-speed memory routing across the circuit board, reducing simulation and validation requirements. This streamlines development cycles, lowers design risk, and minimizes costly board re-spins. Developers can leverage established AMD Vivado and Vitis toolchains, compatible IP, and available reference designs to transition quickly from concept to deployment. Existing customers can adopt the new MoP devices without the need for extensive retraining or design rework.
AMD Versal Premium Gen 2 MoP devices are scheduled to begin sampling at the end of 2026, with production shipments expected in the second half of the following year.
