Microchip Unveils Switchtec Gen 6 PCIe Switches for Next-Generation AI and HPC
As artificial intelligence (AI) and high-performance computing (HPC) workloads continue to push the boundaries of data center performance, the need for faster data transfer and lower latency has never been greater. Addressing these demands, Microchip Technology has introduced its Switchtec Gen 6 PCIe Switches—the industry’s first PCIe Gen 6 switches built on a 3 nm process. This new family of switches is engineered to deliver reduced power consumption and supports up to 160 lanes, enabling high-density connectivity for advanced AI systems.
Key Features of Switchtec Gen 6 PCIe Switches
The Switchtec Gen 6 PCIe switches are designed to overcome the bandwidth limitations of previous PCIe generations, which often resulted in bottlenecks between CPUs, GPUs, memory, and storage. With PCIe 6.0, bandwidth is doubled to 64 GT/s (giga transfers per second) per lane, ensuring that even the most powerful AI accelerators receive a consistent data supply.
These switches facilitate high-speed, low-latency connectivity between CPUs, GPUs, SoCs, AI accelerators, and storage devices. This capability is essential for data center architects looking to scale next-generation AI and cloud infrastructure efficiently. The architecture supports up to 20 ports and 10 stacks, with each port featuring hot- and surprise-plug controllers for flexible system design.
Security is a core focus, with advanced features such as a hardware root of trust and secure boot. The switches utilize post-quantum safe cryptography, compliant with the Commercial National Security Algorithm Suite (CNSA) 2.0, to protect critical data and system integrity.
Enhanced Performance and Reliability for AI Workloads
The PCIe 6.0 standard introduces several innovations that benefit AI and HPC environments. Flow Control Unit (FLIT) mode, lightweight Forward Error Correction (FEC), and dynamic resource allocation all contribute to more efficient and reliable data transfers. These enhancements are particularly valuable for handling the small data packets typical in AI workloads, resulting in higher throughput and lower effective latency.
Switchtec Gen 6 switches also support Non-Transparent Bridging (NTB) for connecting and isolating multiple host domains, as well as multicast capabilities for one-to-many data distribution within a single domain. Advanced error containment, comprehensive diagnostics, and debug features are built in, along with a wide range of I/O interfaces and an integrated MIPS processor. Bifurcation options at x8 and x16, and input/output reference clocks based on PCIe stacks, provide further flexibility for system designers.
Development Tools and Ecosystem Support
To streamline development and deployment, the Switchtec Gen 6 PCIe Switch family is supported by Microchip’s ChipLink diagnostic tools. ChipLink offers a user-friendly graphical interface for configuration, analysis, and troubleshooting, connecting via in-band PCIe or sideband signals such as UART, TWI, and EJTAG. Additionally, the PM61160-KIT Switchtec Gen 6 PCIe Switch Evaluation Kit provides multiple interfaces for comprehensive evaluation and testing.
Availability
Switchtec Gen 6 PCIe switches are currently available for sampling to qualified customers, marking a significant step forward in enabling high-performance, secure, and scalable AI and HPC infrastructure.
